Lean, informalized

Nielsen & Chuang · Chapter 4, Quantum circuits · p. 198

Exercise 4.44 - Circuits of a doubly controlled rotation by an irrational angle, with two ancilla qubits, approach every unitary up to a phase

A single three qubit gate is universal.

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The Exercise

Fix a real number α\alpha. The gate GG acts on three qubits: when the first two are both in the state |1⟩|1\rangle it applies iRx(πα)iR_x(\pi\alpha) to the third, the rotation by the angle πα\pi\alpha about the xˆ\hat x axis multiplied by ii, and otherwise it leaves the three qubits alone.✦ The exercise is to show that GG is universal for quantum computation whenever α\alpha is irrational: circuits made of copies of GG alone approximate any unitary operation on any number of qubits.

Gates on Qubits

A quantum system SS is given by its state space, a finite dimensional complex Hilbert space, and a pure state ψ\psi of SS is a unit vector of that space. The composite system S⊗TS \otimes T of two systems SS and TT is the system whose state space is the tensor product of theirs.✦ A unitary UU of SS is an operator on the state space of SS with U†U=UU†=1U^\dagger U = U U^\dagger = 1.✦ For a unitary VV of TT, the product unitary U⊗VU \otimes V is the unitary of S⊗TS \otimes T whose operator is the tensor product of the two; with VV the identity, UU acts on the first factor alone.✦

The qubit is the system with state space ℂ2\mathbb{C}^2, and its computational basis states |0⟩|0\rangle and |1⟩|1\rangle are the pure states given by the two standard unit vectors. For a vector n→\vec n in three dimensions, n→⋅σ→=nxX+nyY+nzZ\vec n \cdot \vec\sigma = n_x X + n_y Y + n_z Z combines the Pauli matrices XX, YY, ZZ of (1) with the components of n→\vec n as coefficients, and the rotation Rnˆ(θ)R_{\hat n}(\theta) by an angle θ\theta about a unit vector nˆ\hat n is the unitary of the qubit given by the exponential: X=(0110),Y=(0−ii0),Z=(100−1),Rnˆ(θ)=exp⁡(−iθ2nˆ⋅σ→).X = \begin{pmatrix} 0 & 1 \\ 1 & 0 \end{pmatrix}, \quad Y = \begin{pmatrix} 0 & -i \\ i & 0 \end{pmatrix}, \quad Z = \begin{pmatrix} 1 & 0 \\ 0 & -1 \end{pmatrix}, \qquad R_{\hat n}(\theta) = \exp\Bigl(-\frac{i\theta}{2}\,\hat n \cdot \vec\sigma\Bigr).(1) The rotation about the xˆ\hat x axis is Rx(θ)=Rnˆ(θ)R_x(\theta) = R_{\hat n}(\theta) with nˆ=(1,0,0)\hat n = (1,0,0), so Rx(θ)=exp⁡(−iθX/2)R_x(\theta) = \exp(-i\theta X/2), and iRx(θ)iR_x(\theta) is the unitary of the qubit whose matrix is ii times that of Rx(θ)R_x(\theta).

For a unitary UU of a system SS, the controlled gate C(U)C(U) is the unitary of qubit⊗S\mathrm{qubit} \otimes S that acts on SS as the identity when the control qubit is |0⟩|0\rangle and as UU when it is |1⟩|1\rangle; iterating it gives the doubly controlled gate: C(U)=|0⟩⟨0|⊗1+|1⟩⟨1|⊗U,C2(U)=C(C(U)).C(U) = |0\rangle\langle 0| \otimes 1 + |1\rangle\langle 1| \otimes U, \qquad C^2(U) = C\bigl(C(U)\bigr).(2) The gate GG of the exercise, the Deutsch gate, is the unitary of qubit⊗(qubit⊗qubit)\mathrm{qubit} \otimes (\mathrm{qubit} \otimes \mathrm{qubit}) G=C2(iRx(πα)).G = C^2\bigl(iR_x(\pi\alpha)\bigr).(3)✦

The Register

The circuits act on a register of MM qubits whose wires are split into mm data wires and nn ancilla wires. The qudit with DD levels is the system with state space ℂD\mathbb{C}^D, and its computational basis {|i⟩}\{|i\rangle\} is made of the standard unit vectors; a unitary D×DD \times D matrix NN gives the gate of the qudit that acts as NN in this basis. The register is the qudit with D=2MD = 2^M levels, its basis states |y⟩|y\rangle labelled by the bit strings yy of its MM wires. The data register is the qudit with d=2md = 2^m levels, its basis states |x⟩|x\rangle labelled by the bit strings xx of the data wires.

Extending a data string xx by the value 11 on every ancilla wire gives a string (x,𝟏)(x,\mathbf 1) of the register.✦ The states |x,𝟏⟩|x,\mathbf 1\rangle span the data subspace, where the data sit beside ancillas all in |1⟩|1\rangle. A D×DD \times D matrix NN preserves the data subspace when it maps it into itself, ⟨y|N|x,𝟏⟩=0whenever y is not of the form (x′,𝟏),\langle y|\,N\,|x,\mathbf 1\rangle = 0 \quad \text{whenever } y \text{ is not of the form } (x',\mathbf 1),(4) and its compression to the data subspace is the d×dd \times d matrix Γ(N)xx′=⟨x,𝟏|N|x′,𝟏⟩.\Gamma(N)_{x x'} = \langle x,\mathbf 1|\,N\,|x',\mathbf 1\rangle .(5) The action Γ(E)\Gamma(E) of a unitary EE of the register on the data register is the operator on ℂd\mathbb{C}^d with matrix Γ(N)\Gamma(N), where NN is the matrix of EE.

Circuits of the Deutsch Gate

A matrix WW acting block by block on a single wire cc of the register is fixed by a 2×22 \times 2 matrix B(y)B(y) for each value of the wires other than cc: the element ⟨y|W|y′⟩\langle y|W|y'\rangle is B(y)ycyc′B(y)_{y_c\,y'_c} when yy and y′y' agree on every wire but cc, and zero otherwise.✦ For a set KK of control wires and a 2×22 \times 2 matrix Ũ\tilde U, the multiply controlled gate CcK(Ũ)C^K_c(\tilde U) is the one with B(y)=ŨB(y) = \tilde U when yk=1y_k = 1 for every kk in KK, and B(y)=1B(y) = 1 otherwise.✦ For wires aa, bb and cc, the placed powers of GG are the gates of the register with controls aa and bb and target cc built from the powers ikRx(kπα)i^k R_x(k\pi\alpha) of iRx(πα)iR_x(\pi\alpha): Cc{a,b}(ikRx(kπα)),k∈ℤ.C^{\{a,b\}}_c\bigl(i^k R_x(k\pi\alpha)\bigr), \qquad k \in \mathbb{Z}.(6)✦

A reachable gate is a D×DD \times D matrix that preserves the data subspace, (4), and is a limit of the placed powers (6) for some wires aa, bb and cc.✦ The reachable circuits are the finite products of gates of unitary reachable gates, the identity among them as the empty product; they form the set ℛα\mathcal R_\alpha of unitaries of the register.✦

An identification ee of two systems is a linear isometric bijection between their state spaces, and a unitary UU is carried along it as eUe−1eUe^{-1}. Numbering the basis states |ijk⟩|i\,j\,k\rangle of three qubits as |4i+2j+k⟩|4i+2j+k\rangle identifies three qubits with the qudit with 88 levels and makes GG a unitary of that qudit.✦ With r=2M−3r = 2^{M-3}, sending |ri+l⟩|ri+l\rangle to the product basis state |i⟩⊗|l⟩|i\rangle \otimes |l\rangle identifies the register, the qudit with 8r8r levels, with the composite of the qudits with 88 and rr levels, and along it G⊗1G \otimes 1 becomes a unitary of the register.✦ For an ordered choice of three wires, let σ\sigma be the renumbering of the register’s basis states that puts these wires first, and PσP_\sigma the unitary of the register that permutes the computational basis by it, |i⟩↦|σ(i)⟩|i\rangle \mapsto |\sigma(i)\rangle.✦ Then Pσ−1(G⊗1)PσP_\sigma^{-1}(G \otimes 1)P_\sigma is GG on the chosen wires, the first two its controls, and the identity on the other M−3M-3.

The Claim

Theorem 1. Let the register have at least one data wire and two distinct ancilla wires a0a_0 and a1a_1.

(i) For every real α\alpha and every data wire jj, there is an ordered choice of three wires of the register, with renumbering σ\sigma, for which GG placed on them is a reachable circuit: Pσ−1(G⊗1)Pσ∈ℛα.P_\sigma^{-1}\,(G \otimes 1)\,P_\sigma \in \mathcal R_\alpha .(7)✦

(ii) If α\alpha is irrational, then for every unitary UU on the data register there is a real phase φ\varphi such that eiφUe^{i\varphi}U is a limit of actions of reachable circuits on the data register: eiφU∈{Γ(E):E∈ℛα}¯.e^{i\varphi}\,U \in \overline{\{\,\Gamma(E) : E \in \mathcal R_\alpha\,\}} .(8)✦

What Is Checked

The claim is stated over the Deutsch gate GG of (3), the reachable circuits ℛα\mathcal R_\alpha built from its placed powers, and the action Γ\Gamma of a circuit on the data register.

About these constructions the library proves that C(U)C(U) is unitary for every unitary UU, so that GG is a unitary of three qubits, and that a unitary carried along an identification, or tensored with another unitary, is again unitary, so that Pσ−1(G⊗1)PσP_\sigma^{-1}(G \otimes 1)P_\sigma is a unitary of the register. The matrices that preserve the data subspace include the identity and are closed under multiplication.✦